Berkeley Engineering Home
Volume 2, Issue 1
January 2002



Outline List

In This Issue
Winging It For Airline Safety

Memory and Logic Get Married

Exporting A Top-Notch Education

The Power of Good Vibrations

Berkeley Engineering History: Rube Goldberg

Archives

2001
Nov/Dec
Sept/Oct
July/Aug

Lab Notes, Research from the College of Engineering


Memory and Logic Get Married

Patterson in his office
Peg Skorpinski photo

When he's not designing the future, Dave Patterson is weightlifting, playing soccer, or tooling around on his mountain bike. (Click for larger image.)

When computer science professor David A. Patterson gazes into his crystal ball and lays out the future, the industry listens.

And what they're hearing now is the sound of an IBM chip fabrication plant cranking out the first full prototype of Patterson's IRAM (Intelligent Random Access Memory), a single chip that combines a microprocessor with memory to increase a computer's speed while reducing its hunger for power. If it works as expected, IRAM – with its 100 million transistors jammed onto a single 18.5 mm square bit of silicon - will be the ideal brain for next-generation mobile phones and handheld personal computers.

"IRAM makes for a performance bonanza," says Patterson, who developed the simple yet profound concept with Berkeley computer science professor Katherine Yelick and a small team of dedicated graduate students. "And, it has the advantage of being smaller and more energy-efficient than current architectures."

Patterson is known for predicting the future by inventing it. Two decades ago, he raved about a new computer architecture called RISC — reduced instruction-set computing — an against-the-grain computer architecture he and his students developed to simplify computer chips by dolling out an increased number of tasks to the software. When the speedy and low-cost RISC chips made their commercial debut in the mid-1980s, the microprocessor market was changed forever. After igniting the RISC revolution, Patterson, in collaboration with professor Randy Katz, focused his forecasts on disk drives. The result was RAID (Redundant Arrays of Inexpensive Disks), clusters of fast and cheap disk drives working in tandem. Introduced in 1986, RAID is now the core of a thirty billion dollar per year file server industry.

Patterson and Yelick
Peg Skorpinski photo

During her student years at MIT, Katherine Yelick (right) rowed on the undergraduate and graduate crew teams. These days though, her passion is playing with her two toddlers, ages three and five, and a bit of biking, backpacking, and running. (Click for larger image.)

Following in that illustrious lineage, IRAM has the potential to become the architecture-of-choice in tomorrow's post-PC marketplace where information technology is everywhere, not just on the desktop. The researchers envision personal digital assistants (PDAs) that take dictation, cellular phones with perfect speech recognition and video features, and TV set-top boxes that deliver incredibly fast and lifelike interactive graphics to your living room.

To understand what makes IRAM so smart, you have to know what's under the hood of almost every computer. Start with dynamic random access memory (DRAM) chips, the scratch pad for software. Data is temporarily stored in the DRAM for quick access by the computer's brain, the microprocessor chip. The problem is that the two components can’t communicate quickly enough to take full advantage of the blazing speeds of today's microprocessors. (Today's microprocessor are 100 times faster than their 20-year-old ancestors while memory chips have only seen a tenfold speed increase.) The result is latency, time wasted by the microprocessor waiting for the data it needs from DRAM. The other problem faced by today's microprocessors is available bandwidth, the amount of data that can be transmitted in a given amount of time. To keep cost and power consumption low - critical when it comes to portable electronics - today's DRAM designs are limited to just a handful of connections to the microprocessor.

With IRAM though, data can fly between the memory and the microprocessor through a multitude of short pipes that don't consume nearly the power of chip-to-chip hops. Meanwhile, latency is improved simply because the time a signal takes to travel between the processor and the memory is minimized by the components' proximity. An added bonus is that IRAM's memory and processor are built from just two distinct kinds of modular building blocks that can easily be increased or decreased in number depending on the performance and price goals of the manufacturer.

But according to Berkeley's IRAM researchers, the real power behind the IRAM architecture comes from a fundamental change in the way the processor does its job. To bring out the best in IRAM, Yelick revisited a 30-year-old concept called vector processing, invented to perform scientific calculations on room-size mainframe computers. Based on code donated from supercomputer superpower Cray Inc., Yelick developed software that enables IRAM's vector processor to be programmed in today’s common computer tongues.

Ultimately though, whether IRAM ends up inside tomorrow's mobile phones, PDAs, and interactive televisions is up to the industry.

"What we've always done was to prove an idea with a prototype so that commercial companies could build newer and bigger things by putting more than a half-dozen people on the project," Patterson says. "Our goal really is just to convince skeptics and inspire others to take our work further."



The Berkeley IRAM Project

David A. Patterson's home page

Katherine Yelick's home page


Lab Notes is published online by the Public Affairs Office of the UC Berkeley College of Engineering. The Lab Notes mission is to illuminate groundbreaking research underway today at the College of Engineering that will dramatically change our lives tomorrow.

Lab Notes is written by David Pescovitz.
Send comments to the Engineering Public Affairs Office: lab-notes@coe.berkeley.edu.

© 2002 UC Regents. Updated 1/10/02.